We're Hiring!

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Neuron IP is actively seeking an ASIC Package Design Engineer to be an integral part of our team, focusing on designing both standardized & custom advanced packages for systems-on-chip, chiplets, and systems-in-package. This role is for you if you are passionate about the design & packaging of high-speed connectivity for applications in AI, HPC, RF, and automotive. 

The Role:  

In our rapidly expanding silicon interfaces R&D group, you'll tackle challenges in designing advanced packages for high-speed analog & digital circuits with the latest FinFET and GAA CMOS technologies.  You'll play a key role in interpreting and implementing SerDes standards into efficient designs, models, and methodologies, collaborating closely across disciplines with system architects, digital designers, physical designers, as well as test and applications engineers to achieve first-pass silicon success. Neuron IP offers a state-of-the-art, remote-first working environment where every role is key to our technical success.  

The Person:  

We are looking for someone with at least 4 years of focused, practical experience in advanced package design or a related field.  You will have a desire for constant learning and growth, a zeal for technical excellence, and an adaptable, positive mindset.  Your communication skills will shine in meetings, presentations, and written documentation. You are comfortable learning new skills for your role, and flexible enough to work with colleagues situated in different time zones.  We value creative thinkers and detail-driven problem-solvers who take the initiative to do what needs to be done. 

The Future: 

Neuron IP is a company committed to training and growing your career on the job.  You will work with experts in the various fields of analog & digital circuits, and will be given the tools, training and exposure to quickly grow you into one such expert in the field with broad experience in package design, and a deep expertise in high-speed wireline bump maps & protocols. 

Key Responsibilities & Preferred Experience: 

• Knowledgeable in S-parameters, Signal Integrity concepts, robust PDN design, and System-in-Package & Multi-Chip-Module Design Fundamentals. 
• Proficiency with Package Designer EDA Software (such as Cadence Allegro) and 3D EM extraction software (such as Ansys HFSS) or an equivalent. 
• Familiar with high-speed serial links, advanced memory interfaces, and the design of high lane count BGA or flip chip packages. 
• Develop & document design methodologies, automations, and test plans. 
• Collaborate with various team members to refine design and verification processes, ensuring high-quality and efficient design outputs.  
• Informed about industry advancements and able to communicate data within the team & externally, including at industry events or customer meetings.  
• Preferred candidates will have completed the process from design to manufacture for tapeout for at least 1-2 packages and will have experience with RDL/interposer advanced packages. 

Academic Credentials: 

• Bachelor's or Master’s degree in Electrical/Computer Engineering,Engineering Science, or a related field.  

Neuron IP is a leader in Silicon IP, integrating advanced capabilities into SoCs efficiently. We're driving innovation in areas such as AI, the cloud, chiplets, 5G, and IoT. If you're passionate about pioneering technology, Neuron IP is your platform to excel.